VIA Apollo KX133 Athlon Chipset - Part 1

There isn’t much of a performance difference in Content Creation Winstone 2000 simply because most of the applications fit within the Athlon’s 128KB L1 cache and/or its 512KB L2 cache. 

Any difference in performance here is negligible since the range of 0.4 Winstone points isn’t enough to justify any performance analysis. 

While the performance improvement the KX133 with regular SDRAM offers over the AMD 750 chipset solely because of the 133MHz memory bus is barely 3%, turning on SuperBypass, a feature exclusive to the AMD 750 chipset that helps to reduce memory latencies, the AMD 750 jumps ahead of even the KX133 using 133MHz Virtual Channel SDRAM. 

VIA has been notorious for having memory timing issues with their integrated DRAM controllers, the most recent case being the 694X (Apollo Pro 133A) whose memory performance is noticeably slower than that of an equivalently clocked BX setup. 

Since the KX133’s North Bridge borrows the DRAM controller from the 694X you would expect the same timing issues to transfer over to the KX133, and they do.  The AMD 750 with SuperBypass enabled, even while running its memory bus at 100MHz, seems to be ever so slightly faster than the KX133 with a 133MHz memory bus, at least in business and content creation applications. 

This is a tad disappointing.  However, in order to investigate the memory performance of the KX133’s DRAM controller, we dug into our stacks of benchmarking software and pulled out two rarely used CDs: Intel’s Business and Consumer Application Launcher software.